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Control Loop Compensation for Buck Converter

Alan Elbanhawy

Executive Director, Advanced Power Systems

Akros Silicon, Inc.

Sunnyvale, CA

email: alan.elbanhawy@akrossilicon.com

 

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Figure 1, Buck converter schematic

Figure 2, Buck converter model
 

                   

                  This worksheet is best viewed at 150% zoom         

                         

Abstract

 

Switch mode power supplies have been supplying most of the DC voltages that modern electronics need for operation. It is not unusual that a single piece of electronic equipment to have more than 10 or even 15 to 20 different voltages all at different currents. The reason for their popularity is their small size coupled with good to excellent power conversion efficiency when compared to other supplies like linear regulators. One more advantage of switch mode power converters is the ability to achieve wide control loop bandwidths to handle the very fast to ultra fast load transients especially when CPUs are used. Towards this end, power supply design engineers must have a good understanding of the stability requirements and be able to design the best fitting compensation circuit for the application.

 

Derivation of the compensation network’s poles and zeros

 

Derive equations for the  poles and zeros of the error amplifier with the compensation network in Figure 2. First calculate the impedance of R1, R3 and C3 in the s domain

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R1*(1/(s*C3)+R3)/(R1+R3+1/(s*C3))

R1*(1/(s*C3)+R3)/(R1+R3+1/(s*C3))

 (1)

Calculate the impedance of R2, C1 and C2 in the s domain

 

(1/(s*C1)+R2)/(s*C2*(1/(s*C2)+1/(s*C1)+R2))

(1/(s*C1)+R2)/(s*C2*(1/(s*C2)+1/(s*C1)+R2))

 (2)

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From equations (2) and (3) Calculate the error amplifier gain in the s domain eq(3) then convert into partial fractions eq(4)

 

EaGain := (1/(s*C1)+R2)*(R1+R3+1/(s*C3))/(s*C2*(1/(s*C2)+1/(s*C1)+R2)*R1*(1/(s*C3)+R3))

(1/(s*C1)+R2)*(R1+R3+1/(s*C3))/(s*C2*(1/(s*C2)+1/(s*C1)+R2)*R1*(1/(s*C3)+R3))

 (3)

simplify(convert(EaGain, parfrac, s))

(R1*s*C3+R3*s*C3+1+R2*s^2*C1*R1*C3+R2*s^2*C1*R3*C3+R2*s*C1)/(s*(1+R3*s*C3)*R1*(C1+C2+R2*s*C2*C1))

 (4)

From equation (4) numerator, we calculate the Error amplifier zeros in the frequency domain in equation (5) below

 

solve(subs(s = 2*Pi*f, R1*s*C3+R3*s*C3+1+R2*s^2*C1*R1*C3+R2*s^2*C1*R3*C3+R2*s*C1), f)

-(1/2)/(R2*Pi*C1), -(1/2)/(Pi*C3*(R1+R3))

 (5)

From equation (4) denominator, we calculate the error amplifier's poles in equations (6) and (7) below

 

solve(subs(s = 2*Pi*f, C1+C2+R2*s*C2*C1), f)

-(1/2)*(C1+C2)/(R2*Pi*C2*C1)

 (6)

solve(subs(s = 2*Pi*f, 1+R3*s*C3), f)

-(1/2)/(R3*Pi*C3)

 (7)

Enter relevant parameters

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Co := 10*10^(-6); fs := 5*10^6; vt := 1; `ΔVSawToothOsc` := 1

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Where:

Lo and Co are the inductor and capacitor of the output filter in Figure 1

fs     is the converter's switching frequency

Rl    is the load resistance at steady state

Vin  is the input voltage

`ΔVSawToothOsc`  is the peak-to-peak oscillator voltage

 

Enter Modulator gain Tr. The DC Gain of the modulator, Tr,  is simply the input voltage (VIN) divided by the peak-to-peak oscillator voltage ΔVSawToothOsc introduced  to the PWM comparator.

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Tr := Vin/`ΔVSawToothOsc`

Vin

 (8)

 

 Compensation scheme

 

 

                                                         

 

Figure 3, Compensation network and Modulator gain poles and zeros placement

 

The compensation network consists of the error amplifier, usually internal to the PWM controller IC, and the associated impedance Z1 and Z2 in equations (27) and (28). The goal of the compensation network is to provide a closed loop transfer function with the highest 0dB crossing frequency and adequate phase margin. The equations below relate the compensation network’s poles, zeros and gain to the components (R1, R2, R3, C1, C2, and C3) in Figure 2.

The following are some guidelines for placing the poles and zeros of the compensation network:

1. Pick a value for the Gain Gm = R2/R1 for desired error amplifier gain

2. Place 1st zero just below the output filter’s double Pole at about 0.75 flc

3. Place 2nd zero at the output filter’s double pole

4. Place 1st Pole at the ESR zero

5. Place 2nd Pole at Half the Switching Frequency fs

6. Calculate the gain and phase and using the plot function, calculate the phase margin

7. Use the interactive graph to fine tune the transfer functionNULL

 

Detailed design procedure

 

Modulator Break Frequency Equations:

 

1- The output filter, Lo and Co,  two poles and output capacitor equivalent series resistor, ESR,  zero

 

flc := 1/(2*Pi*sqrt(Lo*Co))

50*10^(1/2)/(Pi*Lo^(1/2))

 (9)

fesr := 1/(2*Pi*ESR*Co)

50000/(Pi*ESR)

 (10)

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Using equations (6), (7) and 8 we can assign  all the poles and zeroes of the error amplifier

 

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fz1 := 1/(2*Pi*R2*C1)

(1/2)/(R2*Pi*C1)

 (11)

fz2 := 1/(2*Pi*(R1+R3)*C3)

(1/2)/(Pi*C3*(R1+R3))

 (12)

fp1 := 1/(2*Pi*R2*C1*C2/(C1+C2))

(1/2)*(C1+C2)/(R2*Pi*C2*C1)

 (13)

fp2 := 1/(2*Pi*R3*C3)

(1/2)/(R3*Pi*C3)

 (14)

pick mid range gain Gm=R2/R1

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Gm = R2/R1

Gm = R2/R1

 (15)

fz1 = .75*flc

(1/2)/(R2*Pi*C1) = 37.50*10^(1/2)/(Pi*Lo^(1/2))

 (16)

fz2 = flc

(1/2)/(Pi*C3*(R1+R3)) = 50*10^(1/2)/(Pi*Lo^(1/2))

 (17)

fp1 = fesr

(1/2)*(C1+C2)/(R2*Pi*C2*C1) = 50000/(Pi*ESR)

 (18)

fp2 = (1/2)*fs

(1/2)/(R3*Pi*C3) = 2500000

 (19)

(20)

sols := solve({Gm = R2/R1, (1/2)/(Pi*C3*(R1+R3)) = 50*10^(1/2)/(Pi*Lo^(1/2)), (1/2)/(R2*Pi*C1) = 37.50*10^(1/2)/(Pi*Lo^(1/2)), (1/2)/(R3*Pi*C3) = 2500000, (1/2)*(C1+C2)/(R2*Pi*C2*C1) = 50000/(Pi*ESR)}, {C1, C2, C3, R2, R3})

{C1 = 0.4216370214e-2*Lo^(1/2)/(Gm*R1), C2 = -0.1264911064e-1*ESR*Lo^(1/2)/(Gm*R1*(3.*ESR-1264.911064*Lo^(1/2))), C3 = 0.6366197724e-7*(49672.94133*Lo^(1/2)-1.)/R1, R2 = Gm*R1, R3 = R1/(49672.94133*Lo^(1/2)-1.)}

 (21)

R2 := eval(R2, sols)

Gm*R1

 (22)

R3 := eval(R3, sols)

R1/(49672.94133*Lo^(1/2)-1.)

 (23)

In the following equation, we introduced the constant k, l and m to allow us to consider the effect of tolerance of C1, C2 and C3 on the circuit stability

 

C1 := eval(C1, sols)

0.4216370214e-2*Lo^(1/2)/(Gm*R1)

 (24)

C2 := eval(C2, sols)

-0.1264911064e-1*ESR*Lo^(1/2)/(Gm*R1*(3.*ESR-1264.911064*Lo^(1/2)))

 (25)

C3 := eval(C3, sols)

0.6366197724e-7*(49672.94133*Lo^(1/2)-1.)/R1

 (26)

Calculate loop gain as a response to a small test signal Vt

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Z1 := R1*(1/(s*C3)+R3)/(R1+R3+1/(s*C3))

R1*(15707963.27*R1/(s*(49672.94133*Lo^(1/2)-1.))+R1/(49672.94133*Lo^(1/2)-1.))/(R1+R1/(49672.94133*Lo^(1/2)-1.)+15707963.27*R1/(s*(49672.94133*Lo^(1/2)-1.)))

 (27)

Z2 := (1/(s*C1)+R2)/(s*C2*(1/(s*C2)+1/(s*C1)+R2))

-79.05694151*Gm*R1*(3.*ESR-1264.911064*Lo^(1/2))*(237.1708245*Gm*R1/(s*Lo^(1/2))+Gm*R1)/(s*ESR*Lo^(1/2)*(-79.05694151*Gm*R1*(3.*ESR-1264.911064*Lo^(1/2))/(s*ESR*Lo^(1/2))+237.1708245*Gm*R1/(s*Lo^(1/2))+Gm*R1))

 (28)

Vci-Vo = vt

Vci-Vo = 1

 (29)

Vco = -Vci*Z2/Z1

Vco = 79.05694151*Vci*Gm*(3.*ESR-1264.911064*Lo^(1/2))*(237.1708245*Gm*R1/(s*Lo^(1/2))+Gm*R1)*(R1+R1/(49672.94133*Lo^(1/2)-1.)+15707963.27*R1/(s*(49672.94133*Lo^(1/2)-1.)))/(s*ESR*Lo^(1/2)*(-79.05694151*Gm*R1*(3.*ESR-1264.911064*Lo^(1/2))/(s*ESR*Lo^(1/2))+237.1708245*Gm*R1/(s*Lo^(1/2))+Gm*R1)*(15707963.27*R1/(s*(49672.94133*Lo^(1/2)-1.))+R1/(49672.94133*Lo^(1/2)-1.)))

 (30)

Zo := Rl*(ESR+1/(s*Co))/(Rl+ESR+1/(s*Co))

Rl*(ESR+100000/s)/(Rl+ESR+100000/s)

 (31)

Vo = Vco*Zo*Tr/(s*Lo+Zo)

Vo = Vco*Rl*(ESR+100000/s)*Vin/((Rl+ESR+100000/s)*(s*Lo+Rl*(ESR+100000/s)/(Rl+ESR+100000/s)))

 (32)

sols := solve({Vco = 79.05694151*Vci*Gm*(3.*ESR-1264.911064*Lo^(1/2))*(237.1708245*Gm*R1/(s*Lo^(1/2))+Gm*R1)*(R1+R1/(49672.94133*Lo^(1/2)-1.)+15707963.27*R1/(s*(49672.94133*Lo^(1/2)-1.)))/(s*ESR*Lo^(1/2)*(-79.05694151*Gm*R1*(3.*ESR-1264.911064*Lo^(1/2))/(s*ESR*Lo^(1/2))+237.1708245*Gm*R1/(s*Lo^(1/2))+Gm*R1)*(15707963.27*R1/(s*(49672.94133*Lo^(1/2)-1.))+R1/(49672.94133*Lo^(1/2)-1.))), Vo = Vco*Rl*(ESR+100000/s)*Vin/((Rl+ESR+100000/s)*(s*Lo+Rl*(ESR+100000/s)/(Rl+ESR+100000/s))), Vci-Vo = 1}, {Vci, Vco, Vo})

Voc := eval(Vo, sols)

Vcic := eval(Vci, sols)

 

Calculate loop gain G1

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Gl := Voc/Vcic

 

Convert G1 to frequency domain.

The expression for variables Gf, Gain and Phase are very long so they were not displayed for ease of readability

 

The variables Gain1 and Phase1 are identical to Gain and Phase except for the different variable names and they are used in the interactive Bode plot only

 

Gf := evalc(subs(s = (I*2)*Pi*f, Gl))

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Gain := abs(Gf)

Gain1 := abs(subs(Lo = Lo1, Gm = Gm1, Rl = Rl1, ESR = ESR1, Gf))

Phase := argument(Gf)

Phase1 := argument(subs(Lo = Lo1, Gm = Gm1, Rl = Rl1, ESR = ESR1, Gf))

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The following is a Bode plot of the transfer function taken at both light and heavy load i.e. Rl=0.25Ω and Rl=25Ω.

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with(plots); semilogplot({180*subs(Lo = .5*10^(-6), ESR = 0.175e-1, Gm = 3, Rl = 25, Vin = 5, Phase)/Pi, 180*subs(Lo = .5*10^(-6), ESR = 0.175e-1, Gm = 3, Rl = .25, Vin = 5, Phase)/Pi, 20*log10(subs(Lo = .5*10^(-6), ESR = 0.175e-1, Gm = 3, Rl = 25, Vin = 5, Gain)), 20*log10(subs(Lo = .5*10^(-6), ESR = 0.175e-1, Gm = 3, Rl = .25, Vin = 5, Gain))}, f = 10 .. 0.20e8, numpoints = 500, axes = normal, color = ["Teal", red, blue, gold, black], thickness = 2, gridlines = true, caption = typeset("Bode Plot."), font = [TIMES, BOLD, 10], labels = ["Frequency", "Phase and Gain"], labeldirections = [horizontal, vertical])

  

 

The above Bode plot clearly shows that a loop bandwidth of 1MHz can be achieved

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In the following interactive graph, you can change the value of the output inductor from .5μH to 10μH, the Gm factor from 0.5 to 10, the load resistance from 0.1Ω to 1Ω, Capacitor ESR from 5mΩ to 100mΩ and finally the input voltage Vin from 2.5 to 25 . In this way using the sheer power of Maple you can choose the right control loop for your application without having to do trial and error attempts to reach the right component values. Once you have selected the right design, right click on each slider and get the "current position" then calculate the values of Lo, Gm from the equations below. Remember that Lo also affects the ripple current so make sure to select Lo suitable for the switching frequency of your choice. Please note that the axis are logarithmic and hence the changes in Gain and Phase due to different variable value appear small.

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fmin     fmax                          

Use fmin and fmax to set                                              

the x axis start and end                               0.5μH                 10μH        0.5                           10

                                                                                     Lo                                      Gm   

                                                                                                                   

                                                                      .1Ω                       1Ω     5mΩ                       100mΩ            

                                                                                     Rl                                       ESR   

                                                                                                   

                                                                                            2.5V                         25V  

                                                                                                            Vin

                                                                               Fine tune the frequency response

 

OutputInductor := 0.5e-1*10^(-6)*CurrentPositionLo

0.5000000000e-7*CurrentPositionLo

 (33)

GmFactor := .25*CurrentPositionGm

.25*CurrentPositionGm

 (34)

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Finally calculate the values of all the components in the compensation network. R1 is selected to be 1KΩ

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Lo := .5*10^(-6)

ESR := 0.75e-2

R1 := 0.1e4

Gm := 3

"R2 =", R2; "R3 =", R3; "C1 =", C1; "C2 =", C2; "C3 =", C3

"C3 =", 0.2172406001e-8

 (35)

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REFERENCENULL

 

[1]    Slobodan Cuk, "modeling, analysis and design of switching converters," PhD thesis, California Institute of Technology, December 1976

[2]    R. D. Middlebrook, "Measurementof loop gain in feedback systems," International J. of electronics, Vol. 38, n0. 4, pp. 485-512, April 1975

 

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